Gallium Nitride High Electron Mobility Transistors (GaN-HEMTs), are considered a promising way to surpass the fundamental limitations of silicon-based power transistors and realize more compact as well as efficient power circuits. Also due to the ever-increasing proliferation of such power transistors, two physics-based standard models for modeling GaN HEMTs have recently been proposed by the Compact Modeling Council (CMC): the Advanced Spice Model for HEMTs (ASM-HEMT) from IIT Kanpur and the MIT Virtual Source GaN-High Voltage (MVSG-HV) from MIT. However, due to their complex structure and complicated fabrication, GaN-HEMTs are prone to much more pronounced parasitic effects compared to the established silicon technology, which are caused by the trapping of charge carriers at crystal defects, so-called charge carrier traps. These trapping effects can cause a degradation of the otherwise very advantageous electrical properties. However, in the existing models for the simulation of GaN HEMTs, these effects are only considered in a rather rudimentary way or even not at all.
The goal of the DFG Champagne project (Characterization and modeling of trapping-related effects in gallium-nitride power transistors) is the comprehensive characterization of trapping-induced parasitic effects within GaN HEMTs for power electronics tasks using novel measurement techniques, as well as the generation of a physics-based model for the simulation of such effects in circuit simulators.
The project is funded by the German Research Foundation (DFG) and takes place in cooperation with the University of Cottbus-Senftenberg in Cottbus/ Brandenburg, and the Russel Berrie Nanotechnology Institute of the Technion in Haifa/ Israel.