ECPE modular scaleable Power Electronics Building Block

Packaging Technology of GaN LV msPEBB Phase 2
[Photo: ILH]

System level schematic of the msPEBB - DrGaN
System level schematic of the msPEBB - DrGaN

Aim of this project is the development of an intelligent half-brdige, consisting of two parallel dies, for a 48 V, 10 kW "mild-hybrid" inverter or DC/DC application. To achieve this 100 V, 7 mΩ Galliumnitride dies from GaN Systems will be integrated into a prepackage with a resistiv temperature sensor. These prepackages will be soldered on a main board in a parallel half-bridge configuration. The main board consists of necessary system components and the power and signal connections to the bus.

Cross section prepackage
Cross section prepackage

The prepackages enable, similiar to the monolithic integration, the combination of sensors in close proximity to the actual die. In addition the backside of the chip can be contacted quite well to achieve an optimal thermal connection to the heatsink.

For this purpose a prepreg is laminated onto a copper substrate and a thermister trace is structured on it. Afterwars the GaN Die will be sintered on the surface and enclosed by several prepreg layers. By micro vias the contacts to the chip surface will be manufactured and afterwards structured by traces on the top of the prepackage.

Cross section of overall system with components on the main board
Cross section of overall system with components on the main board

On the main board several components like the gate-driver, the DC-link, the temperature read-out circuit, an overtemeperature protection and a minimal invasiv current sensor for the output current are located. In addition the connection to the heat sink is indicated.

University of Applied Science Kempten
GaN Systems


This image shows Dominik Koch

Dominik Koch


Group Leader Power Electronics / Research Assistant

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